Known methods for coupling together two semiconductor devices or a semiconductor device and a circuit board include the tape automated bonding (TAB) method, and flip chip method. The circuit board in this context may include, in addition to printed circuit boards comprising an insulating base board and an electro-conductive substrate electrode, thin film transistor (TFT) elements, piezoelectric elements and any other electrical elements that may be coupled electrically with semiconductor devices.
In the flip chip method, a semiconductor device to be mounted is provided with protruding contacts of solder (e.g., a tin and lead alloy), and is coupled with another semiconductor device or circuit board by means of the protruding contacts.
FIG. 1 is a cross sectional view of a semiconductor device in which a semiconductor chip 11 comprises an active layer 16 containing transistors, wirings, contacts, or the like, and a chip electrode 13. The chip electrode 13 is exposed via an opening formed in a protection layer 12 comprised of a low melting point glass, a silicon nitride layer, or the like, covering the active surface 16 of semiconductor chip 11. A barrier layer 14 comprised of TiW/Au, or the like, is formed inside and around the opening, and a protruding contact 15 is formed on the barrier layer 14 by electrolytic plating or an evaporation process. The protruding contact 15 is connected to other semiconductor chips or circuit boards.
FIG. 2 is another cross sectional view showing an exemplary combination of semiconductor devices. A semiconductor chip 24 is provided with an Au-surfaced protruding contact 26 and the protruding contact 26 is connected to a substrate electrode 27 made of Al formed on a circuit board 25. An Au-Al alloy layer 28 is formed around the protruding contact 26 and the substrate electrode 27.
However, the conventional semiconductor device described with reference to FIG. 1 has the following drawbacks. The barrier layer 14 is once formed over the whole surface of the semiconductor wafer, and then the undesirable part is etched off, leaving protruding contacts 15. The barrier layer 14 thus has a shape that extends entirely around the opening to prevent overetching. Accordingly, the prior art process is complex. Furthermore, it is difficult in the above described manufacturing process to provide protruding contacts 15 at a fine pitch. This fact limits the possibility of manufacturing smaller semiconductor devices. In the case of a structure as shown in FIG. 1, the pitch between adjacent openings is approximately 20 .mu.m (microns), the diameter of each opening is 100 .mu.m and the height of each protruding contact is 100 .mu.m.
A conventional semiconductor device described with reference to FIG. 2 has the following drawbacks. High temperature heating and heavy loads are applied to semiconductor chip 24 while connecting semiconductor chip 24 to the substrate electrode 27. Such temperatures and loads may lead to breakage and/or deteriorated reliability of semiconductor chip 24, resulting in a reduced manufacturing yield rate of the finished devices.